Llvm “防”反向 pass


#21

然后ir层玩完了也可以搞Platform-Specific的MachineFunctionPass

EDIT: 我已经移除了你论坛账户的新用户限制


#22

先膜


#23

多谢大大!

添加了JNI支持,例如将Java_com_tencent_mm_network_Java2C_getNetworkServerIp改名为Java_com_tencent_mm_network_Java2C_dragonball-are0 虽然Android的工具链还是以GCC为主arm-linux-androideabi-XXX :slight_smile: 不过GCC插件开发起来略别扭。。。

	.text
	.file	"func.c"
	.globl	"Java_com_tencent_mm_network_Java2C_dragonball-are0" # -- Begin function Java_com_tencent_mm_network_Java2C_dragonball-are0
	.p2align	4, 0x90
	.type	"Java_com_tencent_mm_network_Java2C_dragonball-are0",@function
"Java_com_tencent_mm_network_Java2C_dragonball-are0": # @Java_com_tencent_mm_network_Java2C_dragonball-are0
	.cfi_startproc
# BB#0:
	pushq	%rbp
.Lcfi0:
	.cfi_def_cfa_offset 16
.Lcfi1:
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
.Lcfi2:
	.cfi_def_cfa_register %rbp
	subq	$16, %rsp
	movabsq	$.L.str, %rax
	movq	%rdi, -8(%rbp)
	movq	%rsi, -16(%rbp)
	movq	-8(%rbp), %rcx
	movq	(%rcx), %rcx
	movq	1336(%rcx), %rcx
	movq	-8(%rbp), %rdi
	movq	%rax, %rsi
	callq	*%rcx
	addq	$16, %rsp
	popq	%rbp
	retq
.Lfunc_end0:
	.size	"Java_com_tencent_mm_network_Java2C_dragonball-are0", .Lfunc_end0-"Java_com_tencent_mm_network_Java2C_dragonball-are0"
	.cfi_endproc
                                        # -- End function
	.globl	"dragonball-are1"       # -- Begin function dragonball-are1
	.p2align	4, 0x90
	.type	"dragonball-are1",@function
"dragonball-are1":                      # @dragonball-are1
	.cfi_startproc
# BB#0:
	pushq	%rbp
.Lcfi3:
	.cfi_def_cfa_offset 16
.Lcfi4:
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
.Lcfi5:
	.cfi_def_cfa_register %rbp
	subq	$32, %rsp
	movabsq	$.L.str.1, %rax
	movabsq	$.L.str.2, %rcx
	movq	%rdi, -24(%rbp)
	movq	%rsi, -16(%rbp)
	movq	%rax, %rdi
	movq	%rcx, %rsi
	movl	$13, %edx
	movb	$0, %al
	callq	printf
	cmpq	$0, -24(%rbp)
	je	.LBB1_2
# BB#1:
	cmpq	$0, -16(%rbp)
	jne	.LBB1_3
.LBB1_2:
	movl	$-1, -4(%rbp)
	jmp	.LBB1_4
.LBB1_3:
	movl	$0, -4(%rbp)
.LBB1_4:
	movl	-4(%rbp), %eax
	addq	$32, %rsp
	popq	%rbp
	retq
.Lfunc_end1:
	.size	"dragonball-are1", .Lfunc_end1-"dragonball-are1"
	.cfi_endproc
                                        # -- End function
	.globl	"dragonball-are2"       # -- Begin function dragonball-are2
	.p2align	4, 0x90
	.type	"dragonball-are2",@function
"dragonball-are2":                      # @dragonball-are2
	.cfi_startproc
# BB#0:
	pushq	%rbp
.Lcfi6:
	.cfi_def_cfa_offset 16
.Lcfi7:
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
.Lcfi8:
	.cfi_def_cfa_register %rbp
	subq	$16, %rsp
	movabsq	$.L.str.3, %rax
	movabsq	$.L.str.2, %rsi
	movl	%edi, -4(%rbp)
	movl	-4(%rbp), %ecx
	movq	%rax, %rdi
	movl	$21, %edx
	movb	$0, %al
	callq	printf
	xorl	%eax, %eax
	addq	$16, %rsp
	popq	%rbp
	retq
.Lfunc_end2:
	.size	"dragonball-are2", .Lfunc_end2-"dragonball-are2"
	.cfi_endproc
                                        # -- End function
	.globl	main                    # -- Begin function main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# BB#0:
	pushq	%rbp
.Lcfi9:
	.cfi_def_cfa_offset 16
.Lcfi10:
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
.Lcfi11:
	.cfi_def_cfa_register %rbp
	subq	$32, %rsp
	movabsq	$.L.str.5, %rax
	movabsq	$.L.str.6, %rcx
	movabsq	$.L.str.4, %rdx
	movl	$0, -8(%rbp)
	movl	%edi, -4(%rbp)
	movq	%rsi, -24(%rbp)
	movq	%rdx, -16(%rbp)
	movq	%rax, %rdi
	movq	%rcx, %rsi
	movb	$0, %al
	callq	printf
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	"dragonball-are1"
	movl	$4294967295, %edi       # imm = 0xFFFFFFFF
	callq	"dragonball-are2"
	xorl	%eax, %eax
	addq	$32, %rsp
	popq	%rbp
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object          # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"140.207.135.104"
	.size	.L.str, 16

	.type	.L.str.1,@object        # @.str.1
.L.str.1:
	.asciz	"DEBUG: %s, line %d\n"
	.size	.L.str.1, 20

	.type	.L.str.2,@object        # @.str.2
.L.str.2:
	.asciz	"func.c"
	.size	.L.str.2, 7

	.type	.L.str.3,@object        # @.str.3
.L.str.3:
	.asciz	"DEBUG: %s, line %d: ID %d\n"
	.size	.L.str.3, 27

	.type	.L.str.4,@object        # @.str.4
.L.str.4:
	.asciz	"Vml5Z0pFZGk9UHg2a2dPY0loZW49S3cxN3dVQUFBPT0"
	.size	.L.str.4, 44

	.type	main.buf,@object        # @main.buf
	.section	.rodata,"a",@progbits
main.buf:
	.ascii	"\0224Vx"
	.size	main.buf, 4

	.type	.L.str.5,@object        # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"Hello world: %s\n"
	.size	.L.str.5, 17

	.type	.L.str.6,@object        # @.str.6
.L.str.6:
	.asciz	"6xxzcQMhb4WgKX0EUkwG747K"
	.size	.L.str.6, 25


	.ident	"Fedora clang version 6.0.0 (trunk 311540) (based on LLVM 6.0.0svn-r311540)"
	.section	".note.GNU-stack","",@progbits


#24

啊。
安卓的JNI/Dalvik就在我的知识范围之外了


#25

原来是腾讯大佬


#26

网易星说笑了


#27

下个月(10月份)到来的LLVM开发者大会的话题分享:Challenges when building an LLVM bitcode Obfuscator http://www.llvm.org/devmtg/2017-10/#talk19


#28

Slide一直没有放出来。。。我直接搬运视频吧 :slight_smile: http://v.youku.com/v_show/id_XMzIzMTg0Mjk5Mg==.html?spm=a2h3j.8428770.3416059.1


#29

我单独开贴贴过地址啦。感谢分享


#30

我比较好奇那个嵌入式clang来做IR的具体是怎么实现的,QuarksLab也没提。大佬有思路吗


#31

视频刚刚搬运过来,还没来得及看,等我领悟后再和大家分享 :slight_smile:

我最近在看“寄存器分配”的PASS,自己实践基于HEA的“图染色” https://github.com/xiangzhai/llvm/blob/avr/lib/CodeGen/RegAllocGraphColoring.cpp#L313 最后会基于AVR target https://reviews.llvm.org/D38029 来跑分和现有的Greedy做比较 :slight_smile:


#32

也很关注Apple的GPU编译器 :slight_smile: http://v.youku.com/v_show/id_XMzIzMTkyNDc0MA==.html?spm=a2h3j.8428770.3416059.1 结合Intel工程师的邮件 http://lists.llvm.org/pipermail/llvm-dev/2017-December/119424.html 可能会有更多启发 :slight_smile:


#33

爬了一圈结合现有对llvm的理解我猜测还是在前端做了一部分工作。比如说在clang层注入c代码/函数定义,ir里提取之类的。


#34

Quarkslab他们在招intern http://lists.llvm.org/pipermail/llvm-dev/2017-December/119720.html 可以进去陶瓷,来了解他们具体如何实现的。
我的实现不在Frontend,我偏向MiddleEnd,也就是IR Transform的地方,例如ScaffCC的GenQASM PASS https://github.com/ScaffCC/scaff-llvm/blob/master/lib/Transforms/Scaffold/GenQASM.cpp 实现Source-to-Source变化的思路,另在IR层添加函数可以参考ScaffCC的FunctionClone PASS https://github.com/ScaffCC/scaff-llvm/blob/master/lib/Transforms/Scaffold/FunctionClone.cpp 一家之言请轻拍砖 :slight_smile:


#35

添加函数我们都会我的意思是看QuarksLab的意思是他们直接运行时用clang生成IR,我现在是手动构造。

另外已经投了国内搞这块的公司的简历


#36

Cool!


#37

不过我觉得GNU工具链也得做,毕竟国内搞Android大厂还没有都迁移到LLVM工具链吧?http://v.youku.com/v_show/id_XMzIzMTk0NjA4MA==.html?spm=a2hzp.8244740.0.0

ARMmbed不做考虑,那是闭源工具链的天下 https://github.com/ARMmbed/mbed-os/pull/5574


#38

那我就不管了。我跟你们不一样我就是个21岁的学生搞LLVM玩玩而已


#39

大佬知道codegen pass正确的注册方式么


#40

不要叫“大佬” :slight_smile: 你看看我的“寄存器分配”图染色PASS:RegAllocGraphColoring的git commit log https://github.com/xiangzhai/llvm/commits/riscv/lib/CodeGen/RegAllocGraphColoring.cpp

正确的注册方式在commit https://github.com/xiangzhai/llvm/commit/696246bb2b6da6878ca8b33a3aa7ee35d0b6aac1#diff-501c2582ca35bae900d2a549c36606c1

和commit https://github.com/xiangzhai/llvm/commit/4ae37b1d6efeef0f76259f88103a4b9dbb68ed3c#diff-501c2582ca35bae900d2a549c36606c1

可以通过LLVM 6.0.0svn工具链编译,我最近在做“指令选择” https://reviews.llvm.org/D41653 等通过审核提交到上游后,我会在杀回RA的 http://lists.llvm.org/pipermail/llvm-dev/2017-December/119741.html 哇哈哈哈哈~~~